91 lines
2.6 KiB
Plaintext
91 lines
2.6 KiB
Plaintext
################################################################################
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## Purpose: Makefile to run a SystemVerilog simulation
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## Author: Chris Spear, Greg Tumbush, and Tim Pylant
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##
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## REVISION HISTORY:
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## $Log: Makefile_DPI,v $
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## Revision 1.2 2011/05/29 20:20:58 tumbush.tumbush
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## Spell SystemVerilog correctly.
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##
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## Revision 1.1 2011/05/29 19:42:30 tumbush.tumbush
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## Check into cloud repository
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##
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## Revision 1.3 2011/05/25 16:24:32 Greg
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## Seperate VFILES for Questa
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##
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## Revision 1.2 2011/05/25 16:22:30 Greg
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## Added header
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##
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###############################################################################
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help:
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@echo "Make targets:"
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@echo "> make vcs # Compile and run with VCS"
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@echo "> make vcsgui # Compile and run with VCS GUI"
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@echo "> make questa_gui # Compile and run with Questa"
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@echo "> make questa_batch # Compile and run with Questa"
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@echo "> make ius # Compile and run with IUS"
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@echo "> make iusgui # Compile and run with IUS GUI"
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@echo "> make clean # Clean up all intermediate files"
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@echo "> make tar # Create a tar file for the current directory"
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@echo "> make help # This message"
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#############################################################################
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# VCS section
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VCS_FLAGS = -sverilog -debug_all -l comp.log
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vcs: simv
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./simv -l sim.log
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vcsgui: simv
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./simv -l sim.log -gui
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simv: ${FILES}
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vcs ${VCS_FLAGS} ${FILES}
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#############################################################################
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# Questa section
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questa_gui: ${FILES} clean
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vlib work
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vmap work work
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vlog ${VFILES}
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gcc -m32 -fPIC -DQUESTA -g -W -shared -I$(QUESTASIM)/include $(CFILES) -o questa.so
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vsim -novopt -do "view wave;add wave -radix hex -r *;run -all" ${TOPLEVEL} -sv_lib questa
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questa_batch: ${FILES} clean
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vlib work
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vmap work work
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vlog ${VFILES}
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gcc -m32 -fPIC -DQUESTA -g -W -shared -I$(QUESTASIM)/include $(CFILES) -o questa.so
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vsim -c -novopt -do "run -all" ${TOPLEVEL} -sv_lib questa
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##############################################################################################
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# Cadence IUS section
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IUS_FLAGS = -debug -gui -input probe.tcl
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ius: ${FILES}
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irun ${FILES}
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iusgui: ${FILES}
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irun ${IUS_FLAGS} ${FILES}
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#############################################################################
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# Housekeeping
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DIR = $(shell basename `pwd`)
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tar: clean
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cd ..; \
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tar cvf ${DIR}.tar ${DIR}
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clean:
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@# VCS Stuff
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@rm -rf simv* csrc* *.log *.vpd .vcsmx_rebuild vc_hdrs.h DVEfiles
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@# Questa stuff
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@rm -rf work *.so transcript vsim.wlf
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@# IUS Stuff
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@rm -rf INCA_libs *shm .simvision *.log *.key
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@# Unix stuff
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@rm -rf *~ core.*
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